EPC2TC32UCAF48 vs EPC2LS20U 对比

详细并排对比 EPC2TC32UCAF48 出自 Altera 和 EPC2LS20U 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC2TC32UCAF48 EPC2LS20U
品牌 Altera Altera
分类 FPGA & CPLD Memory ICs
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $14.20 $4.25
存储容量 1.6 Mb —
Device Family EPC2 (Enhanced Configuration Device) —
Programmability In-system programmable (ISP) via JTAG —
接口 4-wire serial (nCS, DCLK, DATA, nINIT_CONF) + JTAG Altera serial configuration / JTAG
Supply Voltage (VCC) 3.3 V nominal —
FPGA Compatibility Altera SRAM-based LUT FPGAs (Cyclone, Stratix, APEX, ACEX, FLEX, MAX 9000) —
Cascading Supported for bitstreams larger than 1.6 Mb —
封装 32-pin TQFP (CAF48 designation per Altera ordering code) 20-PLCC (J-lead, 9x9 mm)
工作温度 [DATA_NEEDED: commercial 0-70C vs industrial -40-85C variant] [DATA_NEEDED: Operating Temperature]
Data Retention 10 years typical (EEPROM-based) —
Programming Cycles 100 cycles minimum (EEPROM endurance) —
Process Technology CMOS EEPROM —
安装类型 Surface Mount —
MSL 等级 [DATA_NEEDED: MSL classification] [DATA_NEEDED: MSL Level]
RoHS 状态 [DATA_NEEDED: per ordering code; older CAF48 lots were non-RoHS] —
Product Type — In-System Programmable Configuration PROM
Memory Density — 1.6 Mbit
Operating Voltage (VCC) — 3.3 V
Programming Method — In-System Programmable (ISP) via JTAG
Lead-Free / RoHS — Yes (per "U" suffix)
Supported FPGA Families — Cyclone I/II, Stratix/II, APEX-II, ACEX-1K, FLEX-10K, FLEX-6000, MAX-7000
Configuration Modes — PS (Passive Serial), AS, FPP
JTAG Support — Yes (IEEE 1149.1 boundary scan)
Done Pin — Yes (open-drain programmable polarity)
nSTATUS Pin — Yes (open-drain error flag)
nCONFIG Pin — Yes (reset/reconfiguration input)
DCLK Output — Yes (configuration clock to FPGA)
Compliance — RoHS (Pb-free per U suffix)

数据手册与资源

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