EPC2TI32N vs EPC2-TI32 对比
详细并排对比 EPC2TI32N 出自 Altera 和 EPC2-TI32 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPC2TI32N | EPC2-TI32 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | Memory ICs | Memory ICs |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.85 | $9.75 |
| 存储器类型 | In-System Programmable Configuration PROM (Flash) | In-System Programmable Configuration PROM |
| 存储容量 | 1.6 Mbit | 1.6 Mbit |
| Programmable Type | In System Programmable (ISP via JTAG) | — |
| 接口类型 | Parallel configuration data output + JTAG (IEEE 1149.1) ISP | — |
| Supply Voltage - 3.3V Mode | 3.0 V to 3.6 V | — |
| Supply Voltage - 5V Mode | 4.5 V to 5.5 V | — |
| 工作温度 | -40C to +85C | [DATA_NEEDED: Operating temperature range] |
| 封装 / 外壳 | 32-TQFP (7x7 mm) | — |
| 安装类型 | Surface Mount | Surface Mount |
| Packaging | Tray | — |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, Mercury, FLEX 10K | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II |
| JTAG Interface | Yes (IEEE 1149.1 compliant TAP for ISP) | — |
| Configuration Pins | nCONFIG, nSTATUS, CONF_DONE, DCLK, DATA[7:0] | nCONFIG, nSTATUS, CONF_DONE (open-drain) |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead Free | [DATA_NEEDED: lead-free status] | — |
| 接口 | — | Serial configuration, 10 MHz |
| 电源电压 | — | 3.3 V |
| I/O Tolerance | — | 5 V tolerant |
| 封装 | — | 32-pin TQFP (7x7 mm) |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Multi-Device Daisy-Chain Support | — | Yes |
| Lead-Free | — | [DATA_NEEDED: Lead-free status] |
| MSL 等级 | — | [DATA_NEEDED: MSL rating] |