EPC40C100 vs EPC16QC100DM 对比

详细并排对比 EPC40C100 出自 Altera 和 EPC16QC100DM 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC40C100 EPC16QC100DM
品牌 Altera Intel
分类 FPGA & CPLD Memory ICs
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $10.50 $15.85
Memory Density 40 Mbit 16 Mbit (2 Mbyte)
Device Family Enhanced Configuration Device —
Target FPGAs Stratix, Cyclone, APEX, Mercury, ACEX families —
Configuration Mode FPP (Fast Passive Parallel) / PS (Passive Serial) —
Interface Voltage 2.5 V / 3.3 V —
Maximum FPP Clock Frequency 66 MHz —
Programmability In-system programmable (JTAG) —
Error Detection Built-in CRC verification —
工作温度范围 -40 C to +85 C (industrial) -40 C to +85 C (industrial)
封装 100-pin EQFP (Enhanced Quad Flat Pack) 100-pin PQFP (QFPA)
Pin Pitch 0.5 mm —
安装类型 Surface Mount —
MSL 等级 3 (168 hours) [DATA_NEEDED: MSL rating]
RoHS 状态 Compliant —
Lead-Free Yes —
存储器类型 NOR Flash Non-volatile Configuration PROM (NOR flash)
Configuration Interface — Serial (SPI-compatible, Altera FPP mode)
Core Supply Voltage (VCC) — 3.0 V to 3.6 V
I/O Voltage (VIO) — 2.5 V / 3.3 V selectable
Output Voltage (VPP) — 1.8 V / 2.5 V / 3.3 V selectable
Maximum DCLK Frequency — 40 MHz
Cascadable — Yes (multi-device daisy chain via nCASC)
In-System Programming — Yes (IEEE 1532 / JTAG)
Program/Erase Cycles — [DATA_NEEDED: program/erase cycle endurance]
Data Retention — [DATA_NEEDED: data retention years]
Package Code — Q100 + DM suffix
Lead-Free / RoHS — [DATA_NEEDED: lead-free status]
Compatible FPGA Families — Stratix, Cyclone, APEX, ACEX

数据手册与资源

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