EPC4Q100N vs EPC4QC1C00N 对比

详细并排对比 EPC4Q100N 出自 Intel 和 EPC4QC1C00N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC4Q100N EPC4QC1C00N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $21.05 $9.10
存储器类型 Flash (NOR, Enhanced Configuration Device) —
存储容量 4 Mbit (512 Kbyte) —
Configuration Interface Serial (FLEX) / Parallel / JTAG ISP —
电源电压 3.3 V —
Program/Erase Cycles [DATA_NEEDED: minimum endurance in cycles] —
封装 100-pin PQFP 100-pin PQFP (QFP-100)
安装类型 Surface Mount —
工作温度 -40 C to +85 C (industrial) -40 C to +85 C (industrial)
JTAG Support IEEE 1149.1 compliant —
In-System Programmable Yes —
Target FPGA Families Cyclone, Stratix, APEX, Mercury, ACEX Stratix, Cyclone, APEX, Mercury, ACEX
Data Width (parallel mode) 8-bit —
Lead-Free / RoHS [DATA_NEEDED: per lot] —
Status Not Recommended for New Designs (NRND) —
Configuration Schemes Active Serial (AS) / Active Parallel (AP) / Passive Serial (PS) —
MSL 等级 [DATA_NEEDED: per JEDEC J-STD-020] 3 (per JEDEC J-STD-020)
Device Family — Enhanced Configuration Device (EPC4)
Memory Density — 4 Mbit (4,194,304 bits)
Supply Voltage (VCC) — 3.0 V to 3.6 V (3.3 V typical)
I/O Voltage Tolerance — 3.3 V / 5 V tolerant
Interface to FPGA — Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE
Configuration Data Width — 4-bit multiplexed on single DATA pin
In-System Programming — JTAG (IEEE 1149.1)
Programming Voltage — On-chip generated, no external VPP
Page Mode — Yes, multi-page storage supported
Configuration Clock (DCLK) — [DATA_NEEDED: DCLK max frequency]
RoHS 状态 — [DATA_NEEDED: RoHS compliance status]
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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