EPC4QI100N vs EPC8QI100 对比

详细并排对比 EPC4QI100N 出自 Altera 和 EPC8QI100 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPC4QI100N EPC8QI100
品牌 Altera Intel
分类 Memory ICs Memory ICs
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $10.40 $10.85
存储器类型 In-System Programmable Configuration PROM (NOR flash) Flash (NOR, Enhanced Configuration PROM)
存储容量 4 Mbit (4,194,304 bits) 8 Mbit
Programmable Type In System Programmable (ISP via JTAG) —
Supply Voltage (VCC) 3.0 V to 3.6 V —
接口 Altera serial (x1) configuration + JTAG Altera FPGA configuration serial/parallel (FPP) + JTAG (IEEE 1149.1)
Configuration Clock DCLK [DATA_NEEDED: DCLK maximum frequency] —
Active Supply Current (ICC active) [DATA_NEEDED: ICC active typical value] —
Standby Supply Current [DATA_NEEDED: ICC standby typical value] —
工作温度 -40C to +85C (industrial) -40C to +85C (industrial)
Storage Temperature -65C to +150C —
封装 100-pin PQFP (PowerPQFP, 20x14 mm) 100-PQFP (20 x 14 mm)
Package Code QI100 (PQFP-100, industrial) —
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: MSL rating] —
RoHS 状态 [DATA_NEEDED: RoHS compliance] Non-compliant (legacy PQFP, lead-bearing)
JTAG Standard IEEE 1149.1 boundary-scan / ISP —
Cascading Supported (multi-device daisy chain) —
Target FPGAs Altera Cyclone, Cyclone II, Stratix series —
Supply Voltage (Core) — 3.3 V
Supply Voltage (I/O) — 3.3 V
In-System Programmability — IEEE Std. 1532 compliant
Programming Language — Jam STAPL
Boundary Scan — JTAG boundary-scan test supported
Data Compression — Yes (increases effective capacity)
Configuration Controller — On-chip, dedicated to Altera FPGAs
Initiate-Configuration Pin — nINIT_CONF (private JTAG instruction)
Compatible FPGAs — Stratix, Stratix II, APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, Cyclone, Cyclone II, Arria GX, Stratix GX, Stratix II GX

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