EPC8Q100TBAC vs EPC16QI100TBAC 对比

详细并排对比 EPC8Q100TBAC 出自 Intel 和 EPC16QI100TBAC 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPC16QI100TBAC EPC16QI100TBAC - Altera Enhanced Configuration PROM 16Mb | FPGA

EPC16QI100TBAC - Altera Enhanced Configuration PROM 16Mb | FPGA

EPC16QI100TBAC ⚠ 最后一次采购

规格对比

参数 EPC8Q100TBAC EPC16QI100TBAC
品牌 Intel Altera
分类 FPGA & CPLD Memory ICs
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $11.80 $15.95
存储容量 8 Mb —
存储器类型 Flash (non-volatile configuration storage) Flash (Enhanced Configuration Device)
Access Time 90 ns (approximately 10 MHz flash read) —
Flash Read Bandwidth Approximately 160 Mbps (16-bit DQ[] at 10 MHz) —
数据总线宽度 16-bit (DQ[]) —
电源电压 3.3 V 3.3 V
Configuration Modes Supported PS (Passive Serial), FPP (Fast Passive Parallel), PPA (Passive Parallel Asynchronous) —
Programming Interface IEEE 1532 / JTAG (in-system programmable) JTAG / 4-wire passive serial
工作温度 Industrial grade (TBAC suffix) -40C to +85C (industrial)
封装 QFP (TBAC suffix) 100-pin PQFP (20 x 14 mm)
安装类型 Surface Mount Surface Mount (PQFP)
Compatible FPGA Families Altera Stratix, Cyclone, APEX, ACEX —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] —
Lead-Free [DATA_NEEDED: lead-free status] —
Configuration Bitstream Compression Supported (page-mode buffering) —
Memory Density — 16 Mbit (2 Mbyte)
Configuration Modes — Passive Parallel Synchronous (PPS), Passive Parallel Asynchronous (PPA), Passive Serial (PS)
Maximum Configuration Clock — 40 MHz
Number of Configuration Pages — Up to 8 (selectable via PGM[2..0])
In-System Programmable — Yes (via JTAG / IEEE 1149.1)
JTAG Support — Yes (IEEE 1149.1 boundary-scan and programming)
Supported FPGA Families — Altera Stratix, Cyclone, Arria series
Data Compression — Supported (15-30% density gain depending on target FPGA)
MSL 等级 — 3 (168 hours)
Lead-Free / RoHS — Lead-free (per JEDEC J-STD-020); RoHS compliance: [DATA_NEEDED]
Dynamic Reconfiguration — Yes (page mode via PGM[2..0] pins)
Configuration Controller — Integrated

数据手册与资源

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