EPC8Q100TBAC vs EPC8Q100C 对比

详细并排对比 EPC8Q100TBAC 出自 Intel 和 EPC8Q100C 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPC8Q100C EPC8Q100C - 8Mb Enhanced Configuration Device | Altera/Intel

EPC8Q100C - 8Mb Enhanced Configuration Device | Altera/Intel

EPC8Q100C ⚠ 最后一次采购

规格对比

参数 EPC8Q100TBAC EPC8Q100C
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $11.80 $9.65
存储容量 8 Mb —
存储器类型 Flash (non-volatile configuration storage) —
Access Time 90 ns (approximately 10 MHz flash read) —
Flash Read Bandwidth Approximately 160 Mbps (16-bit DQ[] at 10 MHz) —
数据总线宽度 16-bit (DQ[]) —
电源电压 3.3 V 3.3 V (typ)
Configuration Modes Supported PS (Passive Serial), FPP (Fast Passive Parallel), PPA (Passive Parallel Asynchronous) —
Programming Interface IEEE 1532 / JTAG (in-system programmable) —
工作温度 Industrial grade (TBAC suffix) 0 C to +70 C (commercial, 'C' suffix)
封装 QFP (TBAC suffix) 100-pin PQFP (20 x 14 mm)
安装类型 Surface Mount Surface Mount (PQFP)
Compatible FPGA Families Altera Stratix, Cyclone, APEX, ACEX —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] —
Lead-Free [DATA_NEEDED: lead-free status] —
Configuration Bitstream Compression Supported (page-mode buffering) —
Memory Density — 8 Mbit
Device Family — Enhanced Configuration Device (EPC8Q100 series)
Configuration Interface — Serial / Parallel (x8) slave mode
In-System Programming — IEEE 1149.1 JTAG
Cascade Support — Up to 4 devices cascadable
Supported FPGA Families — Altera Cyclone, Cyclone II, Stratix, Stratix GX, Apex series
Configuration Clock — User-programmable internal oscillator
Programming Cycles — 100 minimum endurance cycles
Programming Voltage — 3.3 V in-system (no external VPP)
Lead-Free / RoHS — Lead-free per Altera/Intel Pb-free roadmap
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

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