EPF10K130EBC356-2 vs EPF10K130EBC356-1N 对比

详细并排对比 EPF10K130EBC356-2 出自 Altera 和 EPF10K130EBC356-1N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K130EBC356-2 EPF10K130EBC356-1N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $185.00 $18.20
Family FLEX 10KE FLEX 10KE
Logic Elements / Cells 6,656 —
Equivalent Gates 130K —
Logic Array Blocks (LABs) 832 —
Embedded Memory (EAB RAM) 16 Kbits per EAB —
User I/Os 274 —
Supply Voltage - Core 2.375 V to 2.625 V (2.5 V nominal) —
Logic Family CMOS CMOS
Process Technology 0.22 um 0.22 µm
Maximum Internal Frequency 333.33 MHz 333.33 MHz
Propagation Delay 0.6 ns 0.6 ns
Speed Grade -2 -1
工作温度 0 C to +70 C (Commercial) 0 °C to 70 °C (Commercial)
封装 356-LBGA (35x35 mm) 356-LBGA
安装类型 Surface Mount Surface Mount
Configuration In-system programmable (SRAM) —
JTAG (IEEE 1149.1) Yes —
RoHS 状态 [DATA_NEEDED: rohs_status] [DATA_NEEDED: RoHS compliance for EPF10K130EBC356-1N]
Typical Gates — 130,000
Maximum System Gates — [DATA_NEEDED: maximum system gates for EPF10K130E]
Logic Elements (LEs) — 6,656
Embedded Array Blocks (EABs) — [DATA_NEEDED: EAB count for EPF10K130E]
Total RAM Bits — 65,536
User I/O Pins — 274
Package Code — LBGA
Core Supply Voltage — 2.5 V
I/O Supply Voltage — 3.3 V
JTAG Boundary-Scan — IEEE Std. 1149.1-1990 compliant
PCI Compliance — PCI Local Bus Specification Rev. 2.2 (33/66 MHz, 3.3 V and 5.0 V)

数据手册与资源

浏览全部产品 创建 BOM 获取报价