EPF10K30AQC240-3 vs EPF10K30RC240-3 对比

详细并排对比 EPF10K30AQC240-3 出自 Altera 和 EPF10K30RC240-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K30AQC240-3 EPF10K30RC240-3
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $16.85 $95.00
Family FLEX-10KA FLEX 10K
Logic Elements (Cells) 1,728 —
Usable Gates 30,000 (typical) —
Embedded RAM 12,288 bits —
Logic Array Blocks (LABs) 216 216
User I/Os 189 —
Operating Frequency (typical) 125 MHz —
Process Technology 0.3 µm CMOS 0.42 um CMOS, SRAM-based
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V nominal) —
I/O Voltage 3.3 V / 5 V tolerant —
封装 240-pin PQFP (FQFP-240, BFQFP-240) 240-RQFP / 240-BFQFP Exposed Pad
Package Code PQFP / FQFP —
引脚数量 240 —
工作温度 0 °C to +70 °C (Commercial) 0C to +70C (Commercial)
Speed Grade -3 —
安装类型 Surface Mount (gull-wing) Surface Mount
Configuration SRAM (volatile) — requires configuration device or JTAG —
RoHS 状态 unknown Contains lead (non-RoHS)
Typical Gates — 30,000
Logic Elements (LEs) — 1,728
Embedded Array Blocks (EABs) — 6
Total RAM Bits — 12,288
User I/O Pins — 189
Core Supply Voltage — 5.0 V (VCCINT)
I/O Supply Voltage — 3.3 V or 5.0 V (multiVolt I/O)
Maximum Internal Frequency — 125 MHz (speed grade -3)
Propagation Delay — 0.6 ns typical
Configuration Method — Serial / parallel PROM, JTAG
JTAG Support — Yes (IEEE 1149.1 boundary scan)

数据手册与资源

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