EPF10K50EQC240-2N vs EPF10K50SQC240-3N 对比
详细并排对比 EPF10K50EQC240-2N 出自 Intel 和 EPF10K50SQC240-3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPF10K50EQC240-2N - FLEX 10KE FPGA 50K Gates 240-PQFP | Intel / Altera
EPF10K50EQC240-2N ObsoleteAltera
EPF10K50SQC240-3N - FLEX 10KE 50K Gates FPGA, 240-PQFP | Altera / Intel
EPF10K50SQC240-3N Obsolete规格对比
| 参数 | EPF10K50EQC240-2N | EPF10K50SQC240-3N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $87.20 | $60.00 |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements (LEs) | 2,880 | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| Typical Gates | 50,000 | 50,000 |
| Embedded SRAM | 40,960 bits (5,120 bytes) | — |
| Embedded Array Blocks (EABs) | 4 | 12 |
| Maximum User I/Os | 189 | — |
| 封装 | 240-pin PQFP / BFQFP | 240-pin PQFP (Power Quad Flat Pack), 34.60 x 34.6 mm, 0.5 mm pitch |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Internal Supply Voltage (VCCINT) | 2.5 V | — |
| Internal Performance | 200 MHz | — |
| Propagation Delay | 0.6 ns | — |
| 工作温度 | 0 °C to +70 °C (commercial) | 0 °C to 70 °C (Commercial) |
| Configuration Method | JTAG / external EPC PROM / intelligent controller | — |
| I/O Standards Supported | PCI, LVTTL, LVCMOS (5.0 V / 3.3 V / 2.5 V) | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: RoHS status - older FLEX 10KE part, likely non-compliant] | Compliant (Pb-free N suffix) |
| PCI Compliance | PCI-SIG compliant | — |
| Logic Family | — | CMOS |
| System Gates | — | 40,960 |
| Logic Cells / Elements | — | 2,880 |
| On-chip EAB Memory | — | 24 Kbits |
| User I/Os | — | 189 (per DigiKey listing); 274 user I/Os (per Digchip listing) |
| Number of I/Os (per distributor) | — | 189 (DigiKey / Mouser) |
| Propagation Delay (tpd) | — | 0.6 ns |
| Internal Frequency (Fmax) | — | 166.67 MHz |
| Core Supply Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | MultiVolt: 2.5 V / 3.3 V / 5.0 V tolerant |
| Speed Grade | — | -3 (faster Fmax) |
| Lead-Free Finish (N suffix) | — | Yes |
| JTAG Boundary Scan | — | IEEE Std. 1149.1 compliant |
| Programming Technology | — | SRAM-based, in-system reconfigurable via JTAG |
| Design Tool | — | Altera Quartus II (FLEX 10KE support) |