EPF10K50EQC240-2N vs EPF10K50VQC240-2 对比
详细并排对比 EPF10K50EQC240-2N 出自 Intel 和 EPF10K50VQC240-2 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPF10K50EQC240-2N - FLEX 10KE FPGA 50K Gates 240-PQFP | Intel / Altera
EPF10K50EQC240-2N Obsolete规格对比
| 参数 | EPF10K50EQC240-2N | EPF10K50VQC240-2 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $87.20 | $28.75 |
| Family | FLEX 10KE | FLEX 10K |
| Logic Elements (LEs) | 2,880 | — |
| Logic Array Blocks (LABs) | 360 | — |
| Typical Gates | 50,000 | — |
| Embedded SRAM | 40,960 bits (5,120 bytes) | — |
| Embedded Array Blocks (EABs) | 4 | — |
| Maximum User I/Os | 189 | — |
| 封装 | 240-pin PQFP / BFQFP | 240-BFQFP (240-PQFP / FQFP / QFP-240) |
| Process Technology | 0.22 µm CMOS | 0.42 micrometer CMOS, 4-layer metal |
| Internal Supply Voltage (VCCINT) | 2.5 V | — |
| Internal Performance | 200 MHz | — |
| Propagation Delay | 0.6 ns | — |
| 工作温度 | 0 °C to +70 °C (commercial) | 0 C to +70 C (Commercial) |
| Configuration Method | JTAG / external EPC PROM / intelligent controller | — |
| I/O Standards Supported | PCI, LVTTL, LVCMOS (5.0 V / 3.3 V / 2.5 V) | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: RoHS status - older FLEX 10KE part, likely non-compliant] | [DATA_NEEDED: RoHS status - legacy Altera FLEX 10K family typically non-RoHS Pb-bearing BFQFP; verify on distributor listing] |
| PCI Compliance | PCI-SIG compliant | — |
| Series | — | FLEX-10K |
| Typical Gate Count | — | 50,000 gates |
| Logic Elements (LABs) | — | 360 |
| Logic Cells | — | 2,880 |
| Embedded Array Memory | — | 20,480 bits |
| User I/O Pins | — | 189 |
| Number of Terminals | — | 240 |
| Terminal Form | — | Gull Wing |
| Package Code | — | FQFP |
| Package Shape | — | Square |
| Core Supply Voltage | — | 3.3 V |
| I/O Supply Voltage (MultiVolt) | — | 5.0 V / 3.3 V / 2.5 V |
| Maximum Internal Frequency | — | 125 MHz |
| Propagation Delay (typical) | — | 0.6 ns |
| Temperature Grade | — | Commercial |
| Configuration Scheme | — | SRAM-based, serial / parallel via EPC1/EPC2 |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |