EPF10K50VR1240-4 vs EPF10K50RC240-4 对比

详细并排对比 EPF10K50VR1240-4 出自 Altera 和 EPF10K50RC240-4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K50VR1240-4 EPF10K50RC240-4
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $42.00 $36.50
Family FLEX 10K Embedded Programmable Logic Device FLEX 10K (FPGA)
Series FLEX 10K (V-series, 5V core) FLEX 10K
Typical Gates 20,480 —
Maximum Logic Elements 2,880 —
Embedded Array Blocks (EABs) Yes (per family datasheet) Yes
封装 240-BFQFP Exposed Pad 240-BFQFP Exposed Pad (RQFP)
Pin/Pinout Code R1240 (240-pin BFQFP) —
Speed Grade -4 (slowest in family) —
User I/O [DATA_NEEDED: exact user I/O count for R1240 pinout] —
Process Technology 0.42 µm CMOS SRAM 0.42 µm
Core Supply Voltage 5 V —
I/O Supply Voltage 5 V / 3.3 V (multi-voltage I/O) —
Configuration Method SRAM, JTAG (ByteBlaster/BitBlaster) —
工作温度 [DATA_NEEDED: industrial/commercial temperature grade] 0 °C to 70 °C (Commercial)
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: not stated in verified data] [DATA_NEEDED: RoHS status not confirmed in provided web data]
Lead-Free [DATA_NEEDED: not stated in verified data] —
Usable Gates — 50,000
Logic Cells — 2,880
Logic Array Blocks (LABs) — 360
User I/Os — 189
Propagation Delay (tpd) — 0.6 ns
Internal Frequency (max) — 125 MHz
Supply Voltage (VCCINT) — 5 V
MultiVolt I/O Interface — Yes (VCCIO can be set independently)
Logic Family — CMOS
引脚数量 — 240
Programming — MAX+PLUS II / Quartus (legacy)

数据手册与资源

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