EPF10K50VR1240-4 vs EPF10K50VRC240-4 对比

详细并排对比 EPF10K50VR1240-4 出自 Altera 和 EPF10K50VRC240-4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K50VR1240-4 EPF10K50VRC240-4
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $42.00 $85.30
Family FLEX 10K Embedded Programmable Logic Device FLEX-10K
Series FLEX 10K (V-series, 5V core) —
Typical Gates 20,480 50,000
Maximum Logic Elements 2,880 —
Embedded Array Blocks (EABs) Yes (per family datasheet) 10 (each up to 2,048 bits)
封装 240-BFQFP Exposed Pad 240-pin RQFP (RQFP-240) with exposed pad
Pin/Pinout Code R1240 (240-pin BFQFP) —
Speed Grade -4 (slowest in family) -4
User I/O [DATA_NEEDED: exact user I/O count for R1240 pinout] —
Process Technology 0.42 µm CMOS SRAM —
Core Supply Voltage 5 V —
I/O Supply Voltage 5 V / 3.3 V (multi-voltage I/O) —
Configuration Method SRAM, JTAG (ByteBlaster/BitBlaster) SRAM, serial/parallel via EPC2/EPC8 PROM
工作温度 [DATA_NEEDED: industrial/commercial temperature grade] 0C to +70C (commercial)
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: not stated in verified data] Non-compliant (legacy SnPb lead frame)
Lead-Free [DATA_NEEDED: not stated in verified data] No (commercial grade is SnPb; -N suffix is lead-free)
Logic Elements (LEs) — 2,880
Logic Array Blocks (LABs) — 360
Maximum User I/Os — 189
Core Voltage (VCCINT) — 3.3 V
I/O Voltage (VCCIO) — 3.3 V or 5.0 V tolerant
Internal Frequency (max) — 125 MHz
Propagation Delay (per LE) — 0.6 ns
Programming Interface — JTAG (IEEE 1149.1), ByteBlaster, BitBlaster

数据手册与资源

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