EPF10K50VRC240-1 vs EPF10K50VRC240-4 对比

详细并排对比 EPF10K50VRC240-1 出自 Intel 和 EPF10K50VRC240-4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K50VRC240-1 EPF10K50VRC240-4
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $130.32 $85.30
Family FLEX 10K FLEX-10K
Logic Elements 2,880 —
Typical Gates 50,000 50,000
Embedded Memory 20,480 bits (189 Kb) —
User I/O 274 (max) —
Number of I/O Pins 189 —
封装 240-RQFP Exposed Pad 240-pin RQFP (RQFP-240) with exposed pad
Pins 240 —
Core Voltage (VCCINT) 3.3 V 3.3 V
I/O Voltage (VCCIO) MultiVolt (2.5 V / 3.3 V / 5 V tolerant) 3.3 V or 5.0 V tolerant
Internal Frequency (max) 66.67 MHz 125 MHz
Propagation Delay 0.6 ns —
Process Technology 0.42 µm CMOS —
Logic Family CMOS —
工作温度 0 °C to +70 °C (Commercial) 0C to +70C (commercial)
JTAG Support Yes (IEEE Std 1149.1-1990) —
Configuration Interface JTAG / BitBlaster / ByteBlasterMV / Jam STAPL —
Programming Language Altera MAX+PLUS II / Quartus —
安装类型 Surface Mount Surface Mount
RoHS 状态 Compliant Non-compliant (legacy SnPb lead frame)
Logic Elements (LEs) — 2,880
Logic Array Blocks (LABs) — 360
Maximum User I/Os — 189
Embedded Array Blocks (EABs) — 10 (each up to 2,048 bits)
Speed Grade — -4
Propagation Delay (per LE) — 0.6 ns
Configuration Method — SRAM, serial/parallel via EPC2/EPC8 PROM
Programming Interface — JTAG (IEEE 1149.1), ByteBlaster, BitBlaster
Lead-Free — No (commercial grade is SnPb; -N suffix is lead-free)

数据手册与资源

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