EPF10K50VRC240-3N vs EPF10K50VRC240-1 对比

详细并排对比 EPF10K50VRC240-3N 出自 Intel 和 EPF10K50VRC240-1 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF10K50VRC240-3N EPF10K50VRC240-1
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $58.75 $130.32
Series FLEX 10K —
Family FLEX 10K (Altera / Intel) FLEX 10K
Typical Gates 50,000 50,000
Logic Cells / Logic Elements 2,880 —
Logic Array Blocks (LABs) 360 —
Embedded Array Bits 20,480 bits (EABs) —
Maximum User I/O 189 —
Core Voltage 3.3 V —
Internal Frequency (max) 125 MHz 66.67 MHz
Propagation Delay 0.6 ns (per digchip datasheet snippet) 0.6 ns
Process Technology 0.42 µm CMOS, SRAM-based 0.42 µm CMOS
封装 240-RQFP (RQFP / Power QFP) with exposed pad 240-RQFP Exposed Pad
工作温度 0 °C to +70 °C (Commercial) 0 °C to +70 °C (Commercial)
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: confirm against manufacturer declaration] Compliant
Configuration Method SRAM, in-system programmable via JTAG / serial PROM —
Speed Grade -3 —
Logic Elements — 2,880
Embedded Memory — 20,480 bits (189 Kb)
User I/O — 274 (max)
Number of I/O Pins — 189
Pins — 240
Core Voltage (VCCINT) — 3.3 V
I/O Voltage (VCCIO) — MultiVolt (2.5 V / 3.3 V / 5 V tolerant)
Logic Family — CMOS
JTAG Support — Yes (IEEE Std 1149.1-1990)
Configuration Interface — JTAG / BitBlaster / ByteBlasterMV / Jam STAPL
Programming Language — Altera MAX+PLUS II / Quartus

数据手册与资源

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