EPF6024AQC240-1N vs EPF6024AQC240-1 对比

详细并排对比 EPF6024AQC240-1N 出自 Intel 和 EPF6024AQC240-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF6024AQC240-1N EPF6024AQC240-1
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $54.00 $18.95
Family FLEX 6000 —
Device Type FPGA (Field Programmable Gate Array) —
Typical Gates 24,000 24,000
Logic Cells 1,960 —
Logic Array Blocks (LABs) 196 196
User I/Os 199 199
Embedded Array Blocks (EABs) 4 (2,048 bits each) —
Process Technology 0.42 µm CMOS 0.42 µm CMOS, 4 metal layers, SRAM-based
Core Supply Voltage 3.3 V —
I/O Standards Supported 5.0 V, 3.3 V, 2.5 V (multiVolt I/O) —
Internal Operating Frequency 200 MHz —
封装 240-pin PQFP (BFQFP) —
安装类型 Surface Mount Surface Mount (Gull-Wing leads)
工作温度 0 °C to +85 °C (commercial) 0 °C to +85 °C (commercial grade)
Programming Interface JTAG (IEEE 1149.1) / ByteBlaster —
Configuration SRAM-based, in-system reconfigurable —
RoHS 状态 Non-Compliant (contains lead, per FindIC compare) [DATA_NEEDED: rohs status]
Lead-Free Status Contains Lead —
Device Family — FLEX 6000
Logic Elements / Cells — 1,960
Number of I/O Banks — 4
Maximum Internal Frequency — 200 MHz (typical application reference)
Supply Voltage (VCCINT / VCCIO) — 3.3 V
Package Type — 240-pin PQFP (240-BFQFP), 32 × 32 mm body, 0.5 mm pitch
Configuration Memory — SRAM (volatile, requires external configuration device)
Boundary Scan / JTAG — IEEE 1149.1 compliant

数据手册与资源

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