EPF81188AQC208-2 vs EPF81188AQC240-3 对比
详细并排对比 EPF81188AQC208-2 出自 Altera 和 EPF81188AQC240-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。
Altera
EPF81188AQC208-2 - FLEX 8000 FPGA 12K Gates 148 I/O 5V | Intel / Altera
EPF81188AQC208-2 Obsolete规格对比
| 参数 | EPF81188AQC208-2 | EPF81188AQC240-3 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价(USD) | $21.50 | $30.00 |
| Family | FLEX 8000 | — |
| Logic Elements / Cells | 1008 | — |
| Total Usable Gates | 12,000 | — |
| Number of LABs | 126 | — |
| Number of I/O Pins | 148 | — |
| Number of Registers | 282 to 1500 | — |
| Maximum Operating Frequency | 125 MHz | — |
| Core Supply Voltage | 5 V | — |
| I/O Supply Voltage | 3.3 V or 5.0 V (MultiVolt) | — |
| Configuration Method | Serial or Parallel SRAM, loaded at power-up via EPC1/EPC1064/EPC1213/EPC1441 | SRAM, loaded at power-up via EPC1/EPC1213/EPC1064/EPC1441 or controller |
| 封装 | 208-BFQFP (PQFP, plastic quad flat pack) | 240-pin PQFP (BFQFP) 32x32 mm |
| 安装类型 | Surface Mount | — |
| 工作温度 | -40C to +85C (industrial / commercial grade) | 0 °C to +70 °C (Commercial) |
| RoHS 状态 | [DATA_NEEDED: RoHS status - not stated in datasheet snippets] | Non-compliant (per ICComponents listing) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Process Technology | CMOS, 0.42 um SRAM configuration cell | 0.42 µm CMOS |
| PCI Compliance | Compliant with PCI Local Bus Specification (PCI SIG) | — |
| Embedded Array Blocks (EABs) | Yes (used for RAM/ROM functions) | — |
| In-Circuit Reconfigurability | Yes (via external configuration device) | Yes (ICR) |
| Manufacturer | — | Altera (now Intel) |
| Series | — | FLEX 8000 |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Usable Gates | — | 12,000 |
| Logic Cells / Elements | — | 1,008 |
| Logic Array Blocks (LABs) | — | 126 |
| User I/Os | — | 184 |
| Maximum Toggle Frequency | — | 125 MHz |
| 电源电压 | — | 4.75 V to 5.25 V (5 V nominal) |
| Speed Grade | — | -3 |
| Boundary-Scan Support | — | JTAG IEEE 1149.1 |