EPF8282ALC84-4N vs EPF8636ALC84-4 对比

详细并排对比 EPF8282ALC84-4N 出自 Altera 和 EPF8636ALC84-4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF8282ALC84-4N EPF8636ALC84-4
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $23.85 $24.30
Family FLEX 8000 FLEX 8000
Usable Gates 2,500 —
Logic Elements 208 —
Maximum User I/Os 68 —
Package Type 84-LCC (J-Lead) —
Package Code QCCJ (Plastic Leaded Chip Carrier, J-Bend) —
Process Technology 0.42 µm CMOS SRAM 0.42 µm CMOS SRAM
Supply Voltage VCC 5.0 V —
Output Supply Voltage VCCIO 3.3 V or 5.0 V (selectable) —
Maximum Toggle Frequency 125 MHz —
工作温度 0 °C to +70 °C (Commercial) 0 °C to +70 °C (Commercial)
Configuration Method Serial (EPC1/EPC1064/EPC1213/EPC1441) or Parallel EPROM or Controller Serial (EPC1/EPC1064/EPC1213/EPC1441) or parallel EPROM
In-Circuit Reconfigurability Yes (ICR) —
JTAG Boundary-Scan Yes (IEEE 1149.1) —
PCI Compliance PCI Local Bus Specification compliant —
Dedicated Inputs 4 (synchronous control signals) —
安装类型 Surface Mount (J-Lead) Surface Mount / Socket
Logic Family CMOS —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] Non-compliant (legacy PLCC, lead-bearing)
Number of Logic Cells — 504
Number of Logic Array Blocks (LABs) — 63
Maximum Usable Gates — 6,000
Number of User I/O Pins — 68
Maximum Operating Frequency — 125 MHz
Supply Voltage (Core) — 5.0 V
I/O Voltage (84-pin PLCC) — 5.0 V only (3.3 V I/O NOT supported on this package)
Operating Current (typical) — 10 mA
封装 — 84-Pin PLCC (J-Lead)
Speed Grade — -4
Configuration Memory Type — Volatile SRAM (requires boot device)
Boundary Scan — IEEE 1149.1 (JTAG)

数据手册与资源

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