EPF8636ALC84-4N vs EPF8636ALC84-4 对比
详细并排对比 EPF8636ALC84-4N 出自 Altera 和 EPF8636ALC84-4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPF8636ALC84-4N | EPF8636ALC84-4 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $7.50 | $24.30 |
| Family | FLEX 8000 | FLEX 8000 |
| Usable Gates | ~6,000 | — |
| Logic Elements (LEs) | 504 | — |
| Logic Array Blocks (LABs) | 63 | — |
| User I/Os | 68 | — |
| 封装 | 84-pin PLCC (J-Lead, plastic) | 84-Pin PLCC (J-Lead) |
| Process Technology | 0.42 µm CMOS SRAM | 0.42 µm CMOS SRAM |
| Supply Voltage (VCC) | 5.0 V | — |
| I/O Standard | 5.0 V TTL/CMOS | — |
| 工作温度 | 0 °C to +70 °C (commercial) | 0 °C to +70 °C (Commercial) |
| Configuration Method | Serial configuration device (EPC1/EPC1064/EPC1213/EPC1441) or parallel EPROM | Serial (EPC1/EPC1064/EPC1213/EPC1441) or parallel EPROM |
| In-Circuit Reconfigurability (ICR) | Yes | — |
| Boundary Scan | IEEE 1149.1 JTAG | IEEE 1149.1 (JTAG) |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | Non-compliant (legacy PLCC, lead-bearing) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Number of Logic Cells | — | 504 |
| Number of Logic Array Blocks (LABs) | — | 63 |
| Maximum Usable Gates | — | 6,000 |
| Number of User I/O Pins | — | 68 |
| Maximum Operating Frequency | — | 125 MHz |
| Supply Voltage (Core) | — | 5.0 V |
| I/O Voltage (84-pin PLCC) | — | 5.0 V only (3.3 V I/O NOT supported on this package) |
| Operating Current (typical) | — | 10 mA |
| 安装类型 | — | Surface Mount / Socket |
| Speed Grade | — | -4 |
| Configuration Memory Type | — | Volatile SRAM (requires boot device) |