EPM1270T144C5N vs EPM240ZM68C7N 对比

详细并排对比 EPM1270T144C5N 出自 Altera 和 EPM240ZM68C7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM1270T144C5N EPM240ZM68C7N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $19.75 $4.20
Family MAX II MAX II
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 980 —
Logic Elements (LEs) 1270 —
Maximum User I/Os 212 —
Number of Logic Array Blocks (LABs) 127 —
Process Technology 0.18 µm 0.18 µm 6-layer-metal flash CMOS
Propagation Delay (tPD) 6.2 ns —
Maximum Internal Frequency 201.1 MHz —
Supply Voltage (Core) 2.5 V / 3.3 V —
Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V —
封装 TQFP-144 (T144), 22 x 22 mm, 0.5 mm pitch 68-ball Micro BGA (MBGA)
工作温度 0 °C to +85 °C (Commercial) [DATA_NEEDED: temperature grade]
Speed Grade -5 —
Programming Interface JTAG (IEEE 1149.1), In-System Programmable —
Configuration Memory Internal flash (non-volatile, instant-on) Non-volatile on-chip flash
RoHS 状态 Compliant (lead-free) Compliant
无卤 Compliant —
安装类型 Surface Mount Surface Mount
Logic Elements (LE) — 240
Equivalent Macrocells — 192
Maximum Operating Frequency — 123.5 MHz
User Flash Memory — 8 Kbits
Core Supply Voltage — 1.8 V (internal regulation from external VCCIO/JTAG)
I/O Voltages Supported — 3.3 V, 2.5 V, 1.8 V (MultiVolt I/O)
Number of I/O Pins — [DATA_NEEDED: I/O count]
JTAG Support — IEEE 1149.1 boundary-scan, in-system programmable
Standby Power — Zero standby current (Z-series)

数据手册与资源

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