EPM240GT100-5N vs EPM240GT100I5N 对比
详细并排对比 EPM240GT100-5N 出自 Altera 和 EPM240GT100I5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM240GT100-5N | EPM240GT100I5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $3.65 | $6.31 |
| Series | MAX II | — |
| Logic Elements | 240 | — |
| Macrocells | 192 | — |
| User Flash Memory | 8 Kbits (8192 bits) | — |
| Maximum User I/O | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns (speed grade 5) | — |
| Maximum Operating Frequency | 100 MHz | — |
| Process Technology | 0.18 µm, 6-layer metal Flash | 0.18 µm 6-layer-metal Flash CMOS |
| 封装 | TQFP-100 (14x14 mm, 0.5 mm pitch) | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| 安装类型 | Surface Mount | Surface Mount |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| 工作温度 | 0C to +85C (commercial) | -40 °C to +100 °C (Industrial) |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (IEEE 1149.1) ISP |
| Configuration Memory | On-chip non-volatile Flash (instant-on) | — |
| RoHS 状态 | Compliant | — |
| MSL 等级 | 3 (168 hours) | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Family | — | MAX II |
| Logic Elements (LEs) | — | 240 |
| Equivalent Macrocells | — | 192 |
| User I/Os | — | 80 |
| Propagation Delay (tPD) | — | 4.7 ns |
| Internal Performance (fMAX) | — | 304 MHz |
| Embedded Non-Volatile Memory | — | 8 Kbits user Flash |
| Supply Voltage - Core (VCCINT) | — | 1.71 V to 1.89 V (3.3 V tolerant for MAX II G variant) |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt I/O |
| Lead-Free / RoHS | — | Yes (suffix N) |