EPM240T100C3N vs EPM240GT100C3N 对比

详细并排对比 EPM240T100C3N 出自 Altera 和 EPM240GT100C3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EPM240GT100C3N EPM240GT100C3N - MAX II CPLD 240 LE TQFP-100 | Intel

EPM240GT100C3N - MAX II CPLD 240 LE TQFP-100 | Intel

EPM240GT100C3N ✓ 量产中

规格对比

参数 EPM240T100C3N EPM240GT100C3N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $9.05 $3.52
Series MAX II MAX II
Device Family MAX II CPLD (EPM240) MAX II G (instant-on, non-volatile CPLD)
Logic Elements (LE) 240 240
Macrocells 192 —
User I/O Pins 80 80
User Flash Memory (UFM) 8 Kbits 8 Kbits
封装 100-pin TQFP (14x14 mm) TQFP-100 (GT100), 16 x 16 mm, 0.5 mm pitch
Configuration Memory Internal Flash (non-volatile) —
Pin-to-Pin Logic Delay (tPD) 4.4 ns (typical) —
Maximum Operating Frequency 200 MHz (internal oscillator) —
Core Supply Voltage (VCCINT) 3.0 V to 3.6 V —
I/O Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Programming Interface JTAG (IEEE 1149.1) / ISP —
工作温度 0 °C to +85 °C (commercial) 0 °C to +85 °C (commercial, suffix C)
Quiescent Current (typical) 35 mA —
RoHS 状态 Compliant —
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: MSL rating] —
Manufacturer — Intel (formerly Altera)
Equivalent Macrocells — 192
Pin-to-Pin Delay (tPD) — 4.7 ns
Process Technology — 0.18 µm 6-layer-metal flash
Core Voltage — 3.3 V
MultiVolt I/O Standards — LVTTL, LVCMOS, PCI, SSTL (1.5 V / 1.8 V / 2.5 V / 3.3 V)
Programmability — In-System Programmable (ISP) via JTAG
Lead-Free / RoHS — Lead Free, RoHS Compliant

数据手册与资源

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