EPM240T100C4N vs EPM240M100C4N 对比

详细并排对比 EPM240T100C4N 出自 Altera 和 EPM240M100C4N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM240T100C4N EPM240M100C4N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $6.10 $7.45
Family MAX II —
Device EPM240 —
Macro Cells 192 192
Logic Elements 240 —
Propagation Delay (tPD) 4.7 ns (max) —
Maximum Frequency 247.5 MHz —
User I/O 80 —
Supply Voltage - Internal 2.5 V / 3.3 V —
I/O Voltage (MultiVolt) 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Process Technology 0.18 µm —
Programmable Type In-System Programmable (Flash) —
封装 / 外壳 100-TQFP —
安装类型 Surface Mount Surface Mount (BGA)
工作温度 0 °C to +85 °C (commercial, 'C' suffix) -40 C to +125 C (industrial)
JTAG Support IEEE 1149.1 boundary-scan —
RoHS 状态 Compliant (lead-free, 'N' suffix) Lead Free (per DigiChip spec sheet)
Series — MAX II
Device Family — EPM240
User I/Os — 80
Propagation Delay (tPD) Max — 4.7 ns
Internal Operating Frequency — 247.5 MHz
Supply Voltage - Core — 2.5 V / 3.3 V
I/O Standards Supported — 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL
User Flash Memory — 8 Kbit
Programmability — In-System Programmable via JTAG (IEEE 1149.1)
Configuration Memory — Non-volatile on-chip flash (instant-on)
Logic Family — CMOS
封装 — 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch
Logic Array Blocks (LABs) — 4 (16 macrocells per LAB)
MultiTrack Interconnect — Yes
Hot Socketing — Yes

数据手册与资源

浏览全部产品 创建 BOM 获取报价