EPM240T100I3N vs EPM240GT100I5N 对比
详细并排对比 EPM240T100I3N 出自 Intel 和 EPM240GT100I5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM240T100I3N - 192-Macrocell MAX II CPLD, 100-TQFP, Industrial | Intel
EPM240T100I3N ⚠ 最后一次采购规格对比
| 参数 | EPM240T100I3N | EPM240GT100I5N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $5.45 | $6.31 |
| Family | MAX II | MAX II |
| Device Logic Elements / Macrocells | 192 macrocells | — |
| Maximum User I/O Pins | 80 | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| On-chip User Flash Memory | 8 Kbits | — |
| Internal Performance | 304 MHz | — |
| Pin-to-pin Logic Delay (tPD1) | 4.6 ns | — |
| Global Clock Networks | 4 | — |
| Technology Node | 0.18 um, 6-layer-metal flash CMOS | — |
| Supply Voltage - Core | 2.5 V / 3.3 V | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| 工作结温 | -40C to +100C (industrial, 'I' grade) | — |
| Speed Grade | 3 | — |
| 封装 | TQFP-100 (T100), 14x14 mm, 0.5 mm pitch | 100-pin TQFP (14x14 mm, 0.5 mm pitch) |
| Programming Interface | JTAG / IEEE 1149.1 ISP | JTAG (IEEE 1149.1) ISP |
| Instant-on (non-volatile) | Yes (flash-based) | — |
| MSL 等级 | 3 (per JEDEC J-STD-020) | — |
| RoHS 状态 | Compliant | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Equivalent Macrocells | — | 192 |
| User I/Os | — | 80 |
| Propagation Delay (tPD) | — | 4.7 ns |
| Internal Performance (fMAX) | — | 304 MHz |
| Embedded Non-Volatile Memory | — | 8 Kbits user Flash |
| Process Technology | — | 0.18 µm 6-layer-metal Flash CMOS |
| Supply Voltage - Core (VCCINT) | — | 1.71 V to 1.89 V (3.3 V tolerant for MAX II G variant) |
| I/O Bank Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt I/O |
| 工作温度 | — | -40 °C to +100 °C (Industrial) |
| Lead-Free / RoHS | — | Yes (suffix N) |
| 安装类型 | — | Surface Mount |