EPM240T100I3N vs EPM240T100C4N 对比
详细并排对比 EPM240T100I3N 出自 Intel 和 EPM240T100C4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM240T100I3N - 192-Macrocell MAX II CPLD, 100-TQFP, Industrial | Intel
EPM240T100I3N ⚠ 最后一次采购规格对比
| 参数 | EPM240T100I3N | EPM240T100C4N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $5.45 | $6.10 |
| Family | MAX II | MAX II |
| Device Logic Elements / Macrocells | 192 macrocells | — |
| Maximum User I/O Pins | 80 | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| On-chip User Flash Memory | 8 Kbits | — |
| Internal Performance | 304 MHz | — |
| Pin-to-pin Logic Delay (tPD1) | 4.6 ns | — |
| Global Clock Networks | 4 | — |
| Technology Node | 0.18 um, 6-layer-metal flash CMOS | — |
| Supply Voltage - Core | 2.5 V / 3.3 V | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| 工作结温 | -40C to +100C (industrial, 'I' grade) | — |
| Speed Grade | 3 | — |
| 封装 | TQFP-100 (T100), 14x14 mm, 0.5 mm pitch | — |
| Programming Interface | JTAG / IEEE 1149.1 ISP | — |
| Instant-on (non-volatile) | Yes (flash-based) | — |
| MSL 等级 | 3 (per JEDEC J-STD-020) | — |
| RoHS 状态 | Compliant | Compliant (lead-free, 'N' suffix) |
| Device | — | EPM240 |
| Macro Cells | — | 192 |
| Logic Elements | — | 240 |
| Propagation Delay (tPD) | — | 4.7 ns (max) |
| Maximum Frequency | — | 247.5 MHz |
| User I/O | — | 80 |
| Supply Voltage - Internal | — | 2.5 V / 3.3 V |
| I/O Voltage (MultiVolt) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Process Technology | — | 0.18 µm |
| Programmable Type | — | In-System Programmable (Flash) |
| 封装 / 外壳 | — | 100-TQFP |
| 安装类型 | — | Surface Mount |
| 工作温度 | — | 0 °C to +85 °C (commercial, 'C' suffix) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |