EPM240ZM100C6N vs EPM240M100C4N 对比

详细并排对比 EPM240ZM100C6N 出自 Intel 和 EPM240M100C4N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM240ZM100C6N EPM240M100C4N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $7.10 $7.45
Family MAX II —
Logic Elements 240 —
Macro Cells 192 192
User I/Os 80 80
Propagation Delay (tPD) 7.5 ns —
Max Internal Frequency 184.1 MHz —
Global Clocks 4 —
User Flash Memory (UFM) 8 Kbits —
Process Technology 0.18 µm 6-layer-metal flash —
Core Supply Voltage 1.8 V —
I/O Supply Voltages (MultiVolt) 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V —
Standby Current 25 µA typical —
封装 100-MBGA (Micro FineLine BGA), 6 × 6 mm, 0.5 mm pitch 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch
工作温度 -40 °C to +125 °C -40 C to +125 C (industrial)
安装类型 Surface Mount (BGA) Surface Mount (BGA)
Programming JTAG ISP (in-system programmable) —
Lead Free Yes —
Series — MAX II
Device Family — EPM240
Propagation Delay (tPD) Max — 4.7 ns
Internal Operating Frequency — 247.5 MHz
Supply Voltage - Core — 2.5 V / 3.3 V
I/O Standards Supported — 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL
User Flash Memory — 8 Kbit
Programmability — In-System Programmable via JTAG (IEEE 1149.1)
Configuration Memory — Non-volatile on-chip flash (instant-on)
Logic Family — CMOS
RoHS 状态 — Lead Free (per DigiChip spec sheet)
Logic Array Blocks (LABs) — 4 (16 macrocells per LAB)
MultiTrack Interconnect — Yes
Hot Socketing — Yes

数据手册与资源

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