EPM3032A-TC44-10 vs EPM3032ALC44-4 对比

详细并排对比 EPM3032A-TC44-10 出自 Altera 和 EPM3032ALC44-4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3032A-TC44-10 EPM3032ALC44-4
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $7.45 $1.10
Family MAX 3000A MAX 3000A
Macrocells 32 32
Logic Array Blocks 2 —
User I/O Pins 34 34
Logic Gates 600 —
Propagation Delay (tPD) 10 ns —
Maximum Internal Frequency 227.3 MHz —
Supply Voltage (VCCINT/VCCIO) 3.0 V to 3.6 V (typ. 3.3 V) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Output Enables 6 —
Configuration Memory CMOS EEPROM (non-volatile) —
封装 TQFP-44 44-pin PLCC (J-Lead)
安装类型 Surface Mount Surface Mount (PLCC J-Lead)
Operating Temperature (Commercial) 0 °C to +70 °C —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Process Technology CMOS EEPROM —
Logic Array Blocks (LABs) — 2
Pin-to-Pin Delay (tPD) — 4.5 ns
Maximum Counter Frequency — 227.3 MHz
Core Supply Voltage (VCCINT) — 3.3 V
I/O Supply Voltage (VCCIO) — 3.3 V (MultiVolt: 5.0 V / 3.3 V / 2.5 V compatible)
Usable Gates — 600 to 10,000 (MAX 3000A family range)
工作温度 — 0°C to +70°C (Commercial)
Technology — CMOS EEPROM-based
In-System Programmability (ISP) — Yes, IEEE Std. 1532 compliant
Boundary-Scan Test — IEEE Std. 1149.1 (JTAG)
Programming Interface — JTAG (ByteBlaster / MasterBlaster)

数据手册与资源

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