EPM3032ALC44-10N vs EPM3032ATC44-10NAA 对比

详细并排对比 EPM3032ALC44-10N 出自 Altera 和 EPM3032ATC44-10NAA 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3032ALC44-10N EPM3032ATC44-10NAA
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $0.94 $9.95
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) —
Logic Gates 600 gates —
Macrocells 32 —
Logic Array Blocks (LABs) 2 —
User I/O Pins 34 —
Propagation Delay (tPD) 10 ns —
Internal fMAX 103.1 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) —
Technology CMOS EEPROM-based —
In-System Programmability Yes, via IEEE 1149.1 JTAG —
ISP Standard Compliance IEEE Std. 1532 —
Boundary-Scan Test (BST) Yes, IEEE 1149.1 compliant —
封装 44-pin PLCC (J-Lead, surface mount) 44-pin TQFP
安装类型 Surface Mount Surface Mount
工作温度 [DATA_NEEDED: industrial/commercial range] —
RoHS 状态 [DATA_NEEDED: compliant or non-compliant] [DATA_NEEDED: RoHS status]
Device Type — CPLD - Complex Programmable Logic Device
Number of Macrocells — 32
Number of Logic Array Blocks (LABs) — 2
Usable Gates — 600
Number of User I/O Pins — 34
Propagation Delay (tpd) — 10 ns
Maximum Internal Frequency — [DATA_NEEDED: fmax spec]
Core Supply Voltage — 3.3 V
I/O Logic Levels Supported — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programming Technology — CMOS EEPROM (non-volatile)
In-System Programming — IEEE Std. 1149.1 JTAG + IEEE Std. 1532
Hot-Socketing Support — Yes
工作温度范围 — [DATA_NEEDED: operating temperature]
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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