EPM3032ALC44-7N vs EPM3032ATI44-7N 对比

详细并排对比 EPM3032ALC44-7N 出自 Altera 和 EPM3032ATI44-7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3032ALC44-7N EPM3032ATI44-7N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $1.05 $4.90
Manufacturer Altera (Intel) —
Series MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 32 —
Logic Gates 600 usable gates —
Propagation Delay (tPD1) 7.5 ns (max, pin-to-pin) —
Internal Counter Frequency (fCNT) 227.3 MHz (max) —
Number of Logic Elements / Blocks 2 LABs (16 macrocells each) —
Number of I/O Pins 34 usable I/O (44 total package pins) —
Number of Dedicated Inputs 4 —
Programmable Type In-System Programmable (ISP) via JTAG (IEEE 1149.1) —
存储器类型 EEPROM (non-volatile, 100 program/erase cycles) —
Supply Voltage - Internal (VCCINT) 3.0 V to 3.6 V (3.3 V typical) —
I/O Bank Voltage (VCCIO) MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant —
工作温度 0C to +70C (commercial grade) —
封装 44-PLCC (J-Lead, 16.59 x 16.59 mm) 44-pin TQFP
安装类型 Surface Mount (PLCC socket compatible) Surface Mount
MSL 等级 3 (168 hours) —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] Compliant
Process Technology CMOS EEPROM —
Device Family — MAX 3000A
Logic Element Count — 600 gates
Macrocells — 32
User I/O Pins — 34
Number of Logic Array Blocks (LABs) — 4
Supply Voltage (VCCINT) — 3.3 V
Maximum Internal Frequency — 138.9 MHz
Pin-to-Pin Propagation Delay (tPD) — 7.5 ns
Speed Grade — -7
工作温度范围 — -40C to +85C (Industrial)
Programming Interface — IEEE 1149.1 JTAG (ISP)
Configuration Memory — Non-volatile EEPROM
I/O Standard Support — multiVolt (1.8 V / 2.5 V / 3.3 V)

数据手册与资源

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