EPM3032ALI44-10N vs EPM3032ALC44-10N 对比
详细并排对比 EPM3032ALI44-10N 出自 Altera 和 EPM3032ALC44-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3032ALI44-10N | EPM3032ALC44-10N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $2.95 | $0.94 |
| Programmable Type | In System Programmable (ISP) | — |
| Family | MAX 3000A | MAX 3000A |
| Number of Macrocells | 32 | — |
| Number of Usable Gates | 600 | — |
| Number of I/O | 34 | — |
| Logic Elements / Blocks | 2 | — |
| Pin-to-Pin Delay (tPD) | 10 ns (speed grade -10) | — |
| Counter Frequency | 227.3 MHz | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Voltage Support (MultiVolt) | 5.0 V / 3.3 V / 2.5 V | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| 封装 | 44-LCC (J-Lead), PLCC-44 | 44-pin PLCC (J-Lead, surface mount) |
| Operating Temperature Grade | Industrial | — |
| Lead Free Status | Contains Lead | — |
| RoHS 状态 | Non-Compliant | [DATA_NEEDED: compliant or non-compliant] |
| PCI Compliance | PCI SIG Revision 2.2 (speed grades -4/-5/-6/-7/-10) | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Gates | — | 600 gates |
| Macrocells | — | 32 |
| Logic Array Blocks (LABs) | — | 2 |
| User I/O Pins | — | 34 |
| Propagation Delay (tPD) | — | 10 ns |
| Internal fMAX | — | 103.1 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) |
| Technology | — | CMOS EEPROM-based |
| In-System Programmability | — | Yes, via IEEE 1149.1 JTAG |
| ISP Standard Compliance | — | IEEE Std. 1532 |
| Boundary-Scan Test (BST) | — | Yes, IEEE 1149.1 compliant |
| 安装类型 | — | Surface Mount |
| 工作温度 | — | [DATA_NEEDED: industrial/commercial range] |