EPM3032ATC44-10AA vs EPM3032A-TC44-10N 对比
详细并排对比 EPM3032ATC44-10AA 出自 Intel 和 EPM3032A-TC44-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3032ATC44-10AA | EPM3032A-TC44-10N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $2.95 | $5.40 |
| Series | MAX 3000A | MAX 3000A |
| Family | CPLD - Complex Programmable Logic | MAX 3000A |
| Macro Cells | 32 | — |
| Logic Array Blocks (LABs) | 2 | — |
| Usable Gates | 600 | 600 |
| Number of I/O | 34 | — |
| Propagation Delay (tPD) | 10 ns (max, -10 speed grade) | — |
| Counter Frequency | 227.3 MHz (max) | — |
| Supply Voltage - Core (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | — |
| Supply Voltage - I/O (VCCIO) | 2.5 V / 3.3 V / 5.0 V selectable | — |
| 工作温度 | 0C to +70C (commercial, 'C' suffix) | [DATA_NEEDED: operating temperature range] |
| 封装 | 44-TQFP (10 mm x 10 mm) | 44-pin TQFP |
| 安装类型 | Surface Mount | Surface Mount |
| Programmable Type | EEPROM (in-system programmable) | — |
| JTAG Interface | IEEE Std. 1149.1 boundary scan + IEEE Std. 1532 ISP | — |
| RoHS 状态 | Compliant (lead-free 'A' suffix) | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Altera (now Intel) |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 32 |
| Logic Elements / LABs | — | 2 Logic Array Blocks |
| User I/O Pins | — | 34 |
| 引脚数 | — | 44 |
| Pin-to-Pin Delay (tPD) | — | 10 ns (commercial speed grade) |
| Counter Frequency (fCNT) | — | up to 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Programming Technology | — | EEPROM (in-system programmable via JTAG / IEEE 1532) |
| Output Enables | — | 6 global OE signals |
| Process Technology | — | CMOS EEPROM |