EPM3032ATC44-10N vs EPM3032ATC44-10AA 对比

详细并排对比 EPM3032ATC44-10N 出自 Intel 和 EPM3032ATC44-10AA 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3032ATC44-10N EPM3032ATC44-10AA
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $2.46 $2.95
Series MAX 3000A MAX 3000A
Device Family CPLD - Complex Programmable Logic Device —
Macrocells 32 —
Logic Array Blocks (LABs) 2 2
Usable Gates 600 600
User I/O Pins 34 —
Pin-to-Pin Logic Delay (tPD) 10 ns —
Maximum Counter Frequency (fCNT) 138.9 MHz —
Core Supply Voltage (VCCINT) 3.3 V —
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
In-System Programmability Yes, IEEE 1149.1 JTAG —
ISP Standard Compliance IEEE Std. 1532 —
Open-Drain I/O Option Yes, per pin —
Configuration Memory EEPROM (non-volatile, instant-on) —
封装 44-pin TQFP 44-TQFP (10 mm x 10 mm)
安装类型 Surface Mount Surface Mount
Operating Temperature (Commercial) 0 C to +70 C —
RoHS 状态 Compliant (lead-free) Compliant (lead-free 'A' suffix)
Family — CPLD - Complex Programmable Logic
Macro Cells — 32
Number of I/O — 34
Propagation Delay (tPD) — 10 ns (max, -10 speed grade)
Counter Frequency — 227.3 MHz (max)
Supply Voltage - Core (VCCINT) — 3.0 V to 3.6 V (3.3 V nominal)
Supply Voltage - I/O (VCCIO) — 2.5 V / 3.3 V / 5.0 V selectable
工作温度 — 0C to +70C (commercial, 'C' suffix)
Programmable Type — EEPROM (in-system programmable)
JTAG Interface — IEEE Std. 1149.1 boundary scan + IEEE Std. 1532 ISP

数据手册与资源

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