EPM3032ATC44-10N vs EPM3032ATC44-10NAB 对比

详细并排对比 EPM3032ATC44-10N 出自 Intel 和 EPM3032ATC44-10NAB 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3032ATC44-10N EPM3032ATC44-10NAB
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $2.46 $4.10
Series MAX 3000A —
Device Family CPLD - Complex Programmable Logic Device —
Macrocells 32 —
Logic Array Blocks (LABs) 2 —
Usable Gates 600 600
User I/O Pins 34 —
Pin-to-Pin Logic Delay (tPD) 10 ns —
Maximum Counter Frequency (fCNT) 138.9 MHz —
Core Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Logic Level Support 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
In-System Programmability Yes, IEEE 1149.1 JTAG —
ISP Standard Compliance IEEE Std. 1532 —
Open-Drain I/O Option Yes, per pin —
Configuration Memory EEPROM (non-volatile, instant-on) Non-volatile EEPROM
封装 44-pin TQFP 44-pin TQFP
安装类型 Surface Mount Surface Mount
Operating Temperature (Commercial) 0 C to +70 C —
RoHS 状态 Compliant (lead-free) Compliant (per -NAB suffix convention)
Product Family — MAX 3000A
Device Type — CPLD (Complex Programmable Logic Device)
Logic Elements / Macrocells — 32 macrocells
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Operating Frequency — 103.1 MHz (per Arrow listing)
Number of User I/O — 34 (max for 44-pin TQFP package)
I/O Supply Voltage (VCCIO) — 3.3 V (MultiVolt I/O compatible with 5.0 V, 3.3 V, 2.5 V logic)
Programming Interface — JTAG (IEEE Std. 1149.1 / IEEE Std. 1532 ISP)
Hot-Socketing Support — Yes
工作温度 — [DATA_NEEDED: operating temperature range]
Delivery Form — Tray ('AB' suffix per Altera order code convention)
Process Technology — CMOS, EEPROM-based

数据手册与资源

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