EPM3032ATI44-10 vs EPM3064ATI44-10 对比

详细并排对比 EPM3032ATI44-10 出自 Altera 和 EPM3064ATI44-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3032ATI44-10 EPM3064ATI44-10
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $0.95 $7.65
Series MAX 3000A —
Programmable Type In-System Programmable (ISP), EEPROM In-System Programmable (ISP), EEPROM-based
Number of Macrocells 32 64
Number of Usable Gates 600 1,250
Number of I/O 34 —
Maximum Propagation Delay (tPD) 10 ns —
Maximum Operating Frequency 103.1 MHz —
Supply Voltage (VCCINT) 3.3 V 3.3 V
工作温度范围 -40 °C to +85 °C (Industrial) —
封装 44-pin TQFP TQFP-44 (10x10 mm, 0.8 mm pitch)
安装类型 Surface Mount Surface Mount
Programming Interface IEEE Std. 1149.1 (JTAG), IEEE Std. 1532 compliant —
Process Technology CMOS EEPROM CMOS, EEPROM
Lead Free Status Contains Lead (non-N suffix) Contains Lead
RoHS 状态 Non-Compliant (non-N suffix) Non-Compliant (contains lead, per DigiChip listing)
Logic Family EE PLD (CPLD) —
MSL 等级 [DATA_NEEDED: MSL rating] —
Family — MAX 3000A
Product Type — CPLD (Complex Programmable Logic Device)
Number of Logic Array Blocks (LABs) — 4
Number of User I/O Pins — 34
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Counter Frequency — 227.3 MHz
I/O Voltage Tolerance — 5.0 V tolerant (MultiVolt I/O)
JTAG Interface — IEEE Std. 1149.1 compliant
ISP Standard — IEEE Std. 1532
工作温度 — -40C to +85C (Industrial)
Programming Cycles — [DATA_NEEDED: typical program/erase endurance]

数据手册与资源

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