EPM3064ALC44-10 vs EPM3064ALI44-10N 对比

详细并排对比 EPM3064ALC44-10 出自 Altera 和 EPM3064ALI44-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3064ALC44-10 EPM3064ALI44-10N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $4.12 $7.80
Family MAX 3000A —
Logic Elements / Macrocells 64 macrocells —
Number of Logic Array Blocks (LABs) 4 —
Usable Gates 1,250 —
Maximum User I/O Pins 34 —
Supply Voltage (VCCINT) 3.3 V —
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Counter Frequency (fCNT) 192.3 MHz —
Maximum Operating Frequency (fMAX) [DATA_NEEDED: fMAX internal] —
封装 44-PLCC (J-Lead) 44-pin PLCC (J-Lead)
Process Technology 0.30 µm CMOS EEPROM —
Programmability In-system programmable (JTAG IEEE 1149.1) —
MultiVolt I/O 2.5V / 3.3V / 5.0V interface compatible —
工作温度 0°C to +70°C (commercial) -40 C to +85 C (Industrial)
RoHS 状态 Compliant (lead-free L suffix indicates Pb-free package) —
安装类型 Surface Mount (PLCC socket compatible) Surface Mount (socketable PLCC)
Series — MAX 3000A
Programmable Type — In System Programmable (ISP)
Number of Macrocells — 64
Number of I/O — 34
Logic Gates — 1250 gates
Number of Logic Elements/Blocks — 4 LABs
Propagation Delay (tPD) — 10 ns (speed grade -10)
Counter Frequency — up to 227.3 MHz
Supply Voltage - Core — 3.3 V
I/O Logic Level Support — 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programming Interface — IEEE Std. 1149.1 JTAG
Lead Free / RoHS Status — Lead Free, RoHS Compliant
Hot-Socketing Support — Yes
Configuration Memory — CMOS EEPROM (non-volatile)

数据手册与资源

浏览全部产品 创建 BOM 获取报价