EPM3064ATC44-10N vs EPM3064ALC44-7N 对比
详细并排对比 EPM3064ATC44-10N 出自 Altera 和 EPM3064ALC44-7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM3064ALC44-7N - 64-Macrocell MAX 3000A CPLD, 7.5ns, 44-PLCC | Intel / Altera
EPM3064ALC44-7N ⚠ 最后一次采购规格对比
| 参数 | EPM3064ATC44-10N | EPM3064ALC44-7N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $5.10 | $3.95 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 1250 | 1,250 |
| Macro Cells | 64 | — |
| User I/O Pins | 34 | — |
| Logic Array Blocks (LABs) | 4 | 2 |
| Pin-to-Pin Delay (tPD) | 10 ns | 7.5 ns |
| Maximum Counter Frequency | 192.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Standard | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) compliant | — |
| 封装 | TQFP-44 (10x10 mm) | 44-pin PLCC |
| 安装类型 | Surface Mount | Surface Mount (PLCC socket compatible) |
| 工作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS 状态 | Compliant | [DATA_NEEDED: RoHS status] |
| Pin-Locking | Yes (across design iterations) | — |
| Logic IC Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 64 |
| Number of User I/O Pins | — | 34 |
| Maximum Frequency | — | 135.1 MHz |
| Core Technology | — | CMOS EEPROM |
| I/O Tolerance | — | 5 V-tolerant |
| In-System Programmability | — | Yes (IEEE Std 1149.1 JTAG) |
| Programming Software | — | Quartus II / Quartus Prime (legacy MAX+PLUS II supported) |