EPM3064ATC44-10N vs EPM3064ATC44-10NAF 对比
详细并排对比 EPM3064ATC44-10N 出自 Altera 和 EPM3064ATC44-10NAF 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM3064ATC44-10NAF - 64-Macrocell MAX 3000A CPLD, 10ns TQFP-44 | Intel
EPM3064ATC44-10NAF Nrnd规格对比
| 参数 | EPM3064ATC44-10N | EPM3064ATC44-10NAF |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $5.10 | $5.05 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 1250 | 1250 |
| Macro Cells | 64 | 64 |
| User I/O Pins | 34 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 192.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.0 V to 3.6 V |
| I/O Standard | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) compliant | Yes (IEEE Std. 1149.1 JTAG) |
| 封装 | TQFP-44 (10x10 mm) | TQFP-44 (10x10 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | 0C to +70C (commercial) | [DATA_NEEDED: industrial/commercial grade] |
| RoHS 状态 | Compliant | Compliant |
| Pin-Locking | Yes (across design iterations) | Yes |
| Series | — | MAX 3000A |
| Logic Elements / LABs | — | 4 LABs (16 macrocells per LAB) |
| Number of I/O Pins | — | 34 |
| Propagation Delay (tPD, max) | — | 10 ns |
| I/O Voltage Tolerance | — | Multi-voltage (3.3 V / 2.5 V / 1.8 V capable) |
| Programmable Technology | — | EEPROM (non-volatile) |
| In-System Programmable | — | Yes (IEEE Std. 1532 compliant) |
| Lead Finish | — | Lead-free (NiPdAu, AF suffix) |
| Configuration Memory Cycles | — | 100 erase/program cycles |