EPM3064ATI100-10N vs EPM3064ATI100-10 对比
详细并排对比 EPM3064ATI100-10N 出自 Altera 和 EPM3064ATI100-10 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3064ATI100-10N | EPM3064ATI100-10 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.80 | $6.80 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Programmable Type | In-System Programmable (ISP) via IEEE 1149.1 JTAG | In-System Programmable (EEPROM) |
| Technology | CMOS EEPROM | — |
| Usable Gates | 1,250 | 1,250 |
| Macrocells | 64 | — |
| Logic Array Blocks (LABs) | 4 | — |
| User I/O | 66 | — |
| Supply Voltage (Core / I/O) | 3.3 V | — |
| Pin-to-Pin Delay (tPD) | 10 ns (-10 speed grade) | — |
| Maximum Internal Frequency | 227.3 MHz (counter) | — |
| 封装 | 100-pin TQFP (industrial) | 100-pin TQFP |
| 工作温度 | -40 C to +85 C (industrial) | — |
| JTAG (IEEE 1149.1) | Yes | — |
| PCI Compliance | PCI Local Bus Specification Revision 2.2 (-4/-5/-6/-7/-10 speed grades) | — |
| MultiVolt I/O | Supports 2.5 V / 3.3 V / 5 V mixed-voltage interfacing | — |
| Lead-Free Status | Contains Lead | — |
| RoHS 状态 | RoHS Non-Compliant | Non-Compliant |
| Number of Macrocells | — | 64 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Number of User I/Os | — | 66 |
| 电源电压 | — | 3.3 V |
| Speed Grade | — | -10 (10 ns pin-to-pin) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |
| 安装类型 | — | Surface Mount |
| Operating Temperature Grade | — | Industrial |
| Lead Free Status | — | Contains Lead |