EPM3064ATI44-10 vs EPM3032ATI44-10 对比

详细并排对比 EPM3064ATI44-10 出自 Intel 和 EPM3032ATI44-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3064ATI44-10 EPM3032ATI44-10
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $7.65 $0.95
Family MAX 3000A —
Product Type CPLD (Complex Programmable Logic Device) —
Programmable Type In-System Programmable (ISP), EEPROM-based In-System Programmable (ISP), EEPROM
Number of Macrocells 64 32
Number of Logic Array Blocks (LABs) 4 —
Number of Usable Gates 1,250 600
Number of User I/O Pins 34 —
封装 TQFP-44 (10x10 mm, 0.8 mm pitch) 44-pin TQFP
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Counter Frequency 227.3 MHz —
Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Voltage Tolerance 5.0 V tolerant (MultiVolt I/O) —
JTAG Interface IEEE Std. 1149.1 compliant —
ISP Standard IEEE Std. 1532 —
工作温度 -40C to +85C (Industrial) —
RoHS 状态 Non-Compliant (contains lead, per DigiChip listing) Non-Compliant (non-N suffix)
Lead Free Status Contains Lead Contains Lead (non-N suffix)
安装类型 Surface Mount Surface Mount
Process Technology CMOS, EEPROM CMOS EEPROM
Programming Cycles [DATA_NEEDED: typical program/erase endurance] —
Series — MAX 3000A
Number of I/O — 34
Maximum Propagation Delay (tPD) — 10 ns
Maximum Operating Frequency — 103.1 MHz
工作温度范围 — -40 °C to +85 °C (Industrial)
Programming Interface — IEEE Std. 1149.1 (JTAG), IEEE Std. 1532 compliant
Logic Family — EE PLD (CPLD)
MSL 等级 — [DATA_NEEDED: MSL rating]

数据手册与资源

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