EPM3064ATI44-4N vs EPM3064ATC44-4N 对比
详细并排对比 EPM3064ATI44-4N 出自 Altera 和 EPM3064ATC44-4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3064ATI44-4N | EPM3064ATC44-4N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $4.25 | $3.45 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | 64 macrocells | — |
| Usable Gates | 1,250 gates | 1,250 |
| Number of Logic Array Blocks (LABs) | 4 LABs (16 macrocells each) | — |
| Maximum Operating Frequency | 222.2 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 4.5 ns (-4 speed grade) | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V | — |
| User I/O Pins | 34 I/O | — |
| 封装 | 44-pin TQFP | 44-pin TQFP |
| 工作温度 | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Programming Interface | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: rohs status] |
| Macro Cells | — | 64 |
| Logic Array Blocks | — | 2 |
| Number of I/Os | — | 34 |
| Dedicated Inputs | — | 4 |
| Propagation Delay (tpd) | — | 4.5 ns |
| Maximum Counter Frequency | — | 222.2 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V or 3.3 V |
| Programmability | — | EEPROM, in-system programmable (JTAG) |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) |