EPM3064ATI44-4N vs EPM3064ATI44-7 对比
详细并排对比 EPM3064ATI44-4N 出自 Altera 和 EPM3064ATI44-7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3064ATI44-4N | EPM3064ATI44-7 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $4.25 | $4.40 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements / Macrocells | 64 macrocells | — |
| Usable Gates | 1,250 gates | 1,250 |
| Number of Logic Array Blocks (LABs) | 4 LABs (16 macrocells each) | — |
| Maximum Operating Frequency | 222.2 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 4.5 ns (-4 speed grade) | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V | — |
| User I/O Pins | 34 I/O | — |
| 封装 | 44-pin TQFP | 44-pin TQFP (TI44) |
| 工作温度 | -40C to +85C (industrial) | -40 °C to +85 °C (Industrial, 'I' suffix) |
| Programming Interface | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 64 |
| User I/O | — | 34 |
| Logic Array Blocks (LABs) | — | 4 (16 macrocells each) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 135.1 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | — | 3.0 V to 3.6 V |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| In-System Programmability | — | Yes, IEEE Std. 1532 compliant |
| JTAG Support | — | Yes (IEEE 1149.1) |
| PCI Compliance | — | Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2 |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |