EPM3064ATI44-7 vs EPM3032ATC44-7 对比

详细并排对比 EPM3064ATI44-7 出自 Altera 和 EPM3032ATC44-7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3064ATI44-7 EPM3032ATC44-7
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $4.40 $2.32
Family MAX 3000A MAX 3000A
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 —
Usable Gates 1,250 600
User I/O 34 —
Logic Array Blocks (LABs) 4 (16 macrocells each) —
Propagation Delay (tPD) 7.5 ns 7.5 ns
Maximum Internal Frequency (fMAX) 135.1 MHz —
Supply Voltage (VCCINT) 3.0 V to 3.6 V 3.3 V
Supply Voltage (VCCIO) 3.0 V to 3.6 V —
Process Technology 0.30 µm CMOS EEPROM CMOS EEPROM (non-volatile)
工作温度 -40 °C to +85 °C (Industrial, 'I' suffix) 0 °C to +70 °C (commercial)
封装 44-pin TQFP (TI44) 44-pin TQFP
安装类型 Surface Mount Surface Mount
In-System Programmability Yes, IEEE Std. 1532 compliant —
JTAG Support Yes (IEEE 1149.1) —
PCI Compliance Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2 —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
MSL 等级 [DATA_NEEDED: MSL level] —
Macro Cells — 32
Logic Array Blocks — 2
Maximum User I/O — 34
Internal Counter Frequency (fCNT) — 138.9 MHz
I/O Standard — MultiVolt, 3.3 V / 5 V tolerant
Programming Interface — JTAG (IEEE 1149.1) ISP
Output Options — Totem-pole or open-drain per I/O
Lead-Free / Pb-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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