EPM3064ATI44-7N vs EPM3064ATI44-4N 对比
详细并排对比 EPM3064ATI44-7N 出自 Altera 和 EPM3064ATI44-4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM3064ATI44-7N | EPM3064ATI44-4N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $5.10 | $4.25 |
| Family | MAX 3000A | MAX 3000A |
| Logic Elements / Macrocells | 64 macrocells | 64 macrocells |
| Usable Gates | 1,250 gates | 1,250 gates |
| Maximum Frequency (fMAX) | 135.1 MHz | — |
| Pin-to-Pin Logic Delay | 7 ns (speed grade -7) | — |
| User I/O Count | 34 I/O | — |
| Dedicated Input Pins | 4 | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt) | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| Programming Interface | IEEE 1149.1 JTAG | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP |
| 封装 | 44-pin TQFP (10x10 mm, 0.8 mm pitch) | 44-pin TQFP |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| RoHS 状态 | Compliant (lead-free, 'N' suffix) | [DATA_NEEDED: rohs status] |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Number of Logic Array Blocks (LABs) | — | 4 LABs (16 macrocells each) |
| Maximum Operating Frequency | — | 222.2 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 4.5 ns (-4 speed grade) |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| Supply Voltage - I/O (VCCIO) | — | 3.3 V or 2.5 V |
| User I/O Pins | — | 34 I/O |
| 工作温度 | — | -40C to +85C (industrial) |
| Configuration Memory | — | EEPROM (non-volatile) |
| 安装类型 | — | Surface Mount |