EPM3064ATI44-7N vs EPM3064ATI44-7 对比

详细并排对比 EPM3064ATI44-7N 出自 Altera 和 EPM3064ATI44-7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3064ATI44-7N EPM3064ATI44-7
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $5.10 $4.40
Family MAX 3000A MAX 3000A
Logic Elements / Macrocells 64 macrocells —
Usable Gates 1,250 gates 1,250
Maximum Frequency (fMAX) 135.1 MHz —
Pin-to-Pin Logic Delay 7 ns (speed grade -7) —
User I/O Count 34 I/O —
Dedicated Input Pins 4 —
Supply Voltage (VCCINT) 3.3 V 3.0 V to 3.6 V
I/O Bank Voltage (VCCIO) 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt) —
Program Memory Type EEPROM (in-system programmable) —
Programming Interface IEEE 1149.1 JTAG —
封装 44-pin TQFP (10x10 mm, 0.8 mm pitch) 44-pin TQFP (TI44)
Operating Temperature Grade Industrial (-40C to +85C) —
RoHS 状态 Compliant (lead-free, 'N' suffix) [DATA_NEEDED: RoHS status]
Process Technology 0.30 µm CMOS EEPROM 0.30 µm CMOS EEPROM
Product Type — CPLD (Complex Programmable Logic Device)
Macrocells — 64
User I/O — 34
Logic Array Blocks (LABs) — 4 (16 macrocells each)
Propagation Delay (tPD) — 7.5 ns
Maximum Internal Frequency (fMAX) — 135.1 MHz
Supply Voltage (VCCIO) — 3.0 V to 3.6 V
工作温度 — -40 °C to +85 °C (Industrial, 'I' suffix)
安装类型 — Surface Mount
In-System Programmability — Yes, IEEE Std. 1532 compliant
JTAG Support — Yes (IEEE 1149.1)
PCI Compliance — Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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