EPM3128ATC100-5N vs EPM3128ATC100-10NS 对比

详细并排对比 EPM3128ATC100-5N 出自 Intel 和 EPM3128ATC100-10NS 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3128ATC100-5N EPM3128ATC100-10NS
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 Obsolete
库存状态 有库存 有库存
单价(USD) $8.20 $6.50
Device Family MAX 3000A —
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 128 —
Logic Array Blocks (LABs) 8 (16 macrocells each) —
Usable Gates Up to 10,000 —
User I/Os 80 80
Propagation Delay (tPD) 5 ns —
Maximum Internal Frequency 192.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
I/O Supply Voltage (VCCIO) 3.3 V or 2.5 V —
Programming Technology EEPROM (non-volatile) —
In-System Programmability Yes (IEEE Std. 1532) —
JTAG Boundary Scan Yes (IEEE 1149.1) —
封装 TQFP-100 (TC100) TQFP-100
工作温度 0 C to +70 C (commercial) [DATA_NEEDED: operating temperature range]
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance status]
Family — MAX 3000A
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 128
引脚数量 — 100
Pin-to-Pin Logic Delay (tPD) — 10 ns
Counter Frequency (fCNT) — up to 227.3 MHz
Supply Voltage - Core (VCCINT) — 3.3 V
Supply Voltage - I/O (VCCIO) — 3.3 V or 2.5 V (5.0 V-tolerant inputs)
Logic-Level Compatibility — 5.0 V, 3.3 V, 2.5 V
Programmability — In-system (ISP), IEEE Std. 1532
Boundary Scan — IEEE 1149.1 JTAG
Configuration Memory — EEPROM (non-volatile)
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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