EPM3128ATC100-7 vs EPM3128ATC100-5N 对比

详细并排对比 EPM3128ATC100-7 出自 Intel 和 EPM3128ATC100-5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3128ATC100-7 EPM3128ATC100-5N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $9.20 $8.20
Family MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 —
Typical Gates 2500 —
User I/Os 80 80
Logic Elements / LABs 4 Logic Array Blocks (LABs) —
Propagation Delay (tPD) 7.5 ns 5 ns
Counter Frequency (fCNT) 129.9 MHz —
Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Voltage Tolerance 5.0 V tolerant inputs —
Programming Technology EEPROM (non-volatile, in-system programmable) EEPROM (non-volatile)
ISP Standard IEEE Std. 1532 (JTAG) —
封装 100-pin TQFP, 14x14 mm, 0.5 mm pitch TQFP-100 (TC100)
工作温度 0C to +70C (Commercial) 0 C to +70 C (commercial)
Speed Grade -7 (fastest grade in family) —
Process Technology CMOS EEPROM —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: lead-free status] —
Device Family — MAX 3000A
Product Type — CPLD (Complex Programmable Logic Device)
Macrocells — 128
Logic Array Blocks (LABs) — 8 (16 macrocells each)
Usable Gates — Up to 10,000
Maximum Internal Frequency — 192.3 MHz
I/O Supply Voltage (VCCIO) — 3.3 V or 2.5 V
In-System Programmability — Yes (IEEE Std. 1532)
JTAG Boundary Scan — Yes (IEEE 1149.1)
安装类型 — Surface Mount

数据手册与资源

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