EPM3128ATC144-10 vs EPM3512ATC144 对比

详细并排对比 EPM3128ATC144-10 出自 Altera 和 EPM3512ATC144 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3128ATC144-10 EPM3512ATC144
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $6.20 $8.75
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 —
User I/Os 96 —
Usable Gates 2,500 (typical) —
Logic Elements / LABs 4 Logic Array Blocks —
Propagation Delay (tPD) 10 ns (speed grade -10) [DATA_NEEDED: tPD in ns]
Counter Frequency (fCNT) Up to 227.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
MultiVolt I/O Interface 1.5V / 1.8V / 2.5V / 3.3V —
In-System Programmability IEEE Std. 1532 compliant —
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) —
Configuration Memory EEPROM (non-volatile, instant-on) —
封装 144-pin TQFP (TQ144) TQFP-144 (20x20 mm)
安装类型 Surface Mount Surface Mount
工作温度 0C to +70C (commercial) 0C to +70C (commercial)
RoHS 状态 Compliant Compliant (lead-free suffix variants available)
Lead-Free Yes —
Macrocells — 512
Logic Array Blocks (LABs) — 16
Maximum User I/O Pins — 212
Core Supply Voltage — 3.3 V
Programming Technology — EEPROM (in-system programmable)
JTAG Interface — IEEE Std. 1149.1 (4-pin)
Maximum Frequency — 116 MHz
Product Terms per Macrocell — 32 (expandable)
I/O Standards — LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant
MSL 等级 — 3

数据手册与资源

浏览全部产品 创建 BOM 获取报价