EPM3128ATC144-7 vs EPM3128ATI144-7N 对比
详细并排对比 EPM3128ATC144-7 出自 Intel 和 EPM3128ATI144-7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM3128ATI144-7N - 128 Macrocell CPLD, 129.9MHz, 3.3V | Altera MAX 3000A
EPM3128ATI144-7N ⚠ 最后一次采购规格对比
| 参数 | EPM3128ATC144-7 | EPM3128ATI144-7N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $8.10 | $9.95 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 (16 macrocells each) | — |
| User I/Os | 96 | — |
| 封装 | TQFP-144 (22x22 mm) | 144-pin TQFP |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V (multiVolt) | — |
| Speed Grade | -7 | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency (fCNT) | 129.9 MHz | — |
| Programming Technology | CMOS EEPROM (in-system programmable) | — |
| JTAG Support | IEEE 1149.1 boundary-scan + ISP | — |
| 工作温度 | 0C to +70C (Commercial) | -40C to +85C (industrial) |
| 安装类型 | Surface Mount | — |
| Process Technology | CMOS EEPROM | — |
| Logic Capacity | — | 2.5K gates |
| Maximum Frequency (fMAX) | — | 129.9 MHz |
| Pin-to-Pin Propagation Delay | — | 7.5 ns (speed grade -7) |
| User I/O Pins | — | 96 |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V / 2.5 V / 1.8 V |
| Programmable Logic Technology | — | CMOS EEPROM |
| Programming Interface | — | JTAG (IEEE Std 1149.1) in-system programmable |
| Terminal Pitch | — | 0.5 mm |
| JEDEC Package Code | — | S-PQFP-G144 |
| MultiVolt I/O | — | Yes (interfaces with 5.0V/3.3V/2.5V/1.8V logic) |