EPM3128ATI100-10 vs EPM3128ATC100-7N 对比

详细并排对比 EPM3128ATI100-10 出自 Altera 和 EPM3128ATC100-7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3128ATI100-10 EPM3128ATC100-7N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 不推荐新设计
库存状态 有库存 有库存
单价(USD) $8.40 $3.52
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) —
Macro Cells 128 128
Usable Gates 2,500 Up to 10,000
User I/Os 80 —
Logic Elements / LABs [DATA_NEEDED: LAB count] —
Pin-to-Pin Delay (tPD) 10 ns —
Counter Frequency (fCNT) up to 227.3 MHz —
Supply Voltage (VCCINT) 3.3 V —
MultiVolt I/O Levels 5.0 V / 3.3 V / 2.5 V compatible —
Programmability EEPROM, 3.3 V in-system (JTAG) —
封装 TQFP-100 (1.0 mm pitch, 14x14 mm) TQFP-100 (100-pin TQFP, fine-line BGA-256 noted in third-party listings)
工作温度 -40 °C to +85 °C (industrial) 0C to +70C (Commercial)
Process Technology CMOS EEPROM —
Open-Drain Output Option Yes (per I/O pin) —
Boundary-Scan (JTAG) IEEE 1149.1 compliant —
RoHS 状态 [DATA_NEEDED: RoHS status -10 suffix historically Pb-free; -10N suffix is lead-free] [DATA_NEEDED: RoHS status]
安装类型 Surface Mount Surface Mount
Number of I/Os — 80
Number of Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Propagation Delay (tPD) — 7.5 ns
Counter Frequency (max) — 227.3 MHz
Supply Voltage - Core — 3.3 V
I/O Interface Levels — 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O)
In-System Programmability — Yes (IEEE 1532 / JTAG)
Program Memory Type — EEPROM (non-volatile)
Logic Family — CMOS
Speed Grade — -7

数据手册与资源

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