EPM3256AFC256-10N vs EPM2210F256C5N 对比

详细并排对比 EPM3256AFC256-10N 出自 Altera 和 EPM2210F256C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3256AFC256-10N EPM2210F256C5N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $25.95 $17.85
Family MAX 3000A MAX II
Device Type CPLD (Complex Programmable Logic Device) —
Usable Gates 5,000 gates —
Macrocells 256 1700
Maximum User I/O 161 —
Pin-to-Pin Logic Delay 10 ns —
Maximum Counter Frequency 227.3 MHz —
Core Voltage 3.3 V —
I/O Logic Level Compatibility 5.0 V / 3.3 V / 2.5 V (MultiVolt) —
Programmability EEPROM, in-system programmable (ISP) —
JTAG Interface IEEE 1532 / JTAG (TDI, TDO, TMS, TCK) —
封装 256-pin FineLine BGA 256-ball FineLine BGA (17x17mm, 1mm pitch)
Logic Family CMOS —
PCI Compliance PCI Local Bus Specification Rev 2.2 (at -10 grade) —
工作温度 0 C to 70 C (commercial) 0C to +85C (commercial)
Logic Elements — 2210
User I/Os — 204
User Flash Memory (UFM) — 8 Kbits
Propagation Delay (tPD) — 7 ns
Turn-On Delay (tSU) — 11.2 ns
Maximum Internal Frequency — 201.1 MHz
Supply Voltage (VCCINT) — 2.375 V to 3.6 V (3.3 V typical)
I/O Voltage Standards — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Process Technology — 0.18 um CMOS with on-chip flash
Global Clocks — 4
安装类型 — Surface Mount
Configuration Memory — Internal flash (non-volatile, instant-on)
Programming Interface — JTAG (IEEE 1149.1) / ByteBlaster / USB-Blaster
RoHS 状态 — Compliant
Lead-Free — Yes

数据手册与资源

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